This page collects proposals for NES 2.0 submappers that are not yet ready for implementation.
When allocating new submappers, please consult kevtris' original proposal before choosing a number. If it is something he already assigned that we have just not adopted yet, use his existing assignment: submappers.txt
If there is no existing game or ROM that requires a submapper, it should not yet be allocated. There is no end to possible variations of hardware, and there is no need to speculate on the future. If you want to work on a project that will require a new mapper, engage the community and/or seek help from others. Do not pre-emptively add a new mapper to the spec until there is something we can run with it. The spec will still be here when you're finished your project.
Status: Wishlist
Vertical split mode:
0: SL (all known hardware)
1: CL
If only one kind (battery or non-battery) of PRG-RAM present:
0: PRG-RAM is contiguous (EKROM, EWROM)
2: PRG-RAM is not contiguous; is split in half across two chips
If both kinds of PRG-RAM present:
0: Chip 0 is battery-backed (ETROM (note: verify this))
2: Chip 1 is battery-backed
Pulse waves volume:
0: R1 is 6.8kΩ (as in all games that use expansion audio)
4: R1 is 15kΩ (the nominal value of this resistor)
MMC5A features:
0: Enable
8: Disable
It is safe to leave the submapper number at 0 for all known games.
Status: Problem outline
There is a report of a pirate copy of a game that seems to want mapper 70 without bus conflicts, even though Bandai's original hardware should have them.
Tentatively, we could use the same submappers as those standardized for mappers 2, 3, & 7.
There's actually three different versions of the hardware, all assigned to the same mapper.
Unfortunately, we have no idea which is which.
Here's Kevtris's assignments:
"Bog-standard Cony mapper. 1K CHR ROM banks, no WRAM."
"Same, but with 2K CHR ROM banks instead."
"This is the standard Cony mapper with the following changes:
There is a bootleg variant that uses a UM5100 (DPCM) instead of µPD7756C (ADPCM).
Uses µPD7756C (Standard).
Uses UM5100 (Bootleg).